AP SoC (Zynq 7000) Hybrid Hardware Architecture Basics

In this series of tutorial I planned to explain the Zynq 7000 architecture in details. The series is divided into three parts:

  • Firstly,  the peripheral interfaces of processor and FPGA will be explained and implemented in vivado.
  • Secondly, AXI interfaces (AXI4, AXI-Stream, and AXI-lite) will be demonstrated.
  • Lastly, Advance features of Zynq 7000 architecture will be realized e.g performance measurements of DMA , OCM, DDR etc.

I, however, find it better to briefly explain the basic concepts that shall be used later in this series. Read more